TSMC Beats Samsung for Nvidia 3nm HBM Chips [2026]

Samsung Electronics will use TSMC’s 3-nanometre manufacturing process to produce base dies for Nvidia’s next-generation custom high-bandwidth memory chips, Seoul Economic Daily reported on October 18, 2026. The arrangement, confirmed in a weekend report and picked up by Reuters, would mark the first time Samsung and TSMC have worked together at the HBM manufacturing stage, a corner of the chip business where the two companies have spent two decades as bitter foundry rivals.

The product at the center of the deal is NVHBM, Nvidia’s custom high-bandwidth memory design. According to the Seoul Economic Daily account, Nvidia asked all three of its memory suppliers, Samsung Electronics, SK hynix, and Micron Technology, to adopt TSMC’s process for the NVHBM base dies, while applying sixth-generation DRAM technology to the core dies that sit stacked on top. Samsung accepted those requirements after what the report described as an internal review. The news lands as Nvidia’s data center GPUs keep running into a memory supply wall that is now shaping decisions across the entire chip industry, a theme TrendinTech has tracked through the worst smartphone shipment quarter in 14 years and rising GDDR pricing this fall.

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What Seoul Economic Daily Actually Reported

The Seoul Economic Daily account, detailed by Seoul Economic Daily, says Samsung Electronics will use TSMC’s manufacturing process to produce the base die, a core component of Nvidia’s next-generation custom high-bandwidth memory. The base die sits at the bottom of an HBM stack and acts as the logic layer that connects the memory to the GPU package, distinct from the DRAM dies stacked above it. Nvidia reportedly specified that the base dies for NVHBM should be built on TSMC’s process regardless of which memory maker ultimately assembles and ships the finished stack.

Reuters picked up the Seoul Economic Daily report and distributed it through its wire service, with a version appearing on Fidelity’s news feed dated October 18. The Economic Times in India also ran the Reuters account, noting that Nvidia had asked Samsung, SK hynix, and Micron to use TSMC’s process for the NVHBM base dies and sixth-generation DRAM technology for the core dies, according to coverage from The Economic Times. Pakistan’s The News International carried a similar summary, describing the agreement as a notable strategic departure for Samsung, which has historically run its own foundry operations for memory-adjacent logic work, according to a report from The News International.

None of the companies named in the report, Samsung Electronics, TSMC, Nvidia, SK hynix, or Micron Technology, have issued an on-record statement confirming or denying the arrangement as of this writing. Every account traces back to the same Seoul Economic Daily report citing unnamed industry sources, a pattern typical of South Korean chip reporting, where supply chain details often surface through trade press before companies comment during quarterly earnings calls.

What NVHBM Is and Why It Is Different From Standard HBM

NVHBM refers to Nvidia’s own custom high-bandwidth memory design rather than the off-the-shelf HBM3E or HBM4 modules that SK hynix, Samsung, and Micron currently sell to GPU makers as finished components. Standard HBM today is designed largely by the memory makers themselves, with GPU companies like Nvidia specifying bandwidth and capacity targets and then buying the finished stacks. A custom design flips part of that relationship: Nvidia controls more of the base die architecture, the logic layer that handles the interface between the memory stack and the GPU, while the memory makers continue to produce and stack the DRAM dies on top.

That division of labor explains why Nvidia reportedly specified TSMC’s process for the base die specifically, while leaving the core die DRAM technology to each memory maker’s own sixth-generation process. The base die behaves more like a logic chip than a memory chip, and TSMC’s advanced process nodes have long been the preferred choice for logic work across the industry, including Nvidia’s own GPU dies. Routing the HBM base die through TSMC’s 3-nanometre line lets Nvidia apply the same manufacturing partner and design tools it already uses for its GPU compute dies to the memory stack’s logic layer, which could simplify integration between the two components when they are packaged together.

This approach is not without precedent elsewhere in the industry. GPU makers have increasingly pushed custom silicon arrangements as AI workloads strain conventional memory architectures, a dynamic visible in Nvidia’s own RTX Spark desktop AI hardware push earlier this year, which leaned on tighter integration between compute and memory to cut reliance on cloud inference.

Why Nvidia Asked Three Rival Memory Makers to Use the Same Foundry

According to the Seoul Economic Daily report, Nvidia’s request went out to all three companies that currently supply it with high-bandwidth memory: Samsung Electronics, SK hynix, and Micron Technology. Asking competing memory suppliers to standardize on the same foundry for a shared component is an unusual move, but it fits a pattern Nvidia has leaned on before: forcing consistency across its supplier base so that different vendors’ chips behave predictably when swapped into the same GPU package design.

If all three memory makers use TSMC’s process for the NVHBM base die, Nvidia effectively standardizes the logic interface across every HBM stack it buys, regardless of which company produced it. That reduces the validation work Nvidia’s engineering teams need to do when qualifying memory from multiple sources, and it gives Nvidia more use to negotiate pricing and allocation across SK hynix, Samsung, and Micron independently, since all three would be working from a comparable base die design rather than three divergent architectures.

It also tells a broader story about where bottlenecks sit in the AI hardware supply chain right now. Nvidia’s GPU shipments have outpaced the industry’s ability to supply enough high-bandwidth memory to go with them, a dynamic that has already shown up in Nvidia’s shifting chip market share figures this year as rivals scramble for allocation. Centralizing the base die manufacturing at TSMC, which already runs Nvidia’s compute dies, may be less about any single company’s capacity and more about tightening coordination across the entire GPU package as volumes climb.

Samsung’s Reversal: From Foundry Rival to TSMC Customer

The headline detail in the Seoul Economic Daily report, and the reason it traveled so quickly through financial wires, is that this would be the first time Samsung Electronics and TSMC have partnered at the HBM manufacturing stage. Samsung runs its own foundry business, Samsung Foundry, which competes directly against TSMC for contract manufacturing customers across logic chips, and the two companies have spent years locked in a rivalry for leading-edge process node business from Qualcomm, Nvidia, Apple, and others.

Having Samsung effectively outsource a piece of its own memory product, the HBM base die, to its foundry rival is a departure from how Samsung has typically operated. Samsung has historically preferred to keep as much of its chip production in-house as possible, using its own foundry for logic components wherever feasible, partly to support utilization at Samsung Foundry and partly to avoid depending on a direct competitor for a critical manufacturing step. The Seoul Economic Daily report frames Samsung’s decision as the result of an internal review, after which the company accepted Nvidia’s requirements, suggesting the choice was not one Samsung volunteered so much as one it agreed to under pressure from its largest AI customer.

One detail remains unconfirmed: whether Samsung would still produce NVHBM base dies using its own foundry as a backup if TSMC’s capacity proves insufficient to meet demand. That possibility was attributed to an unnamed source in the reporting and has not been independently verified by any of the outlets covering the story, including the account carried by Ground News, which aggregated multiple versions of the Seoul Economic Daily story. Until Samsung or TSMC comments directly, that contingency plan should be treated as speculative rather than settled.

Inside the 3-Nanometre Base Die Decision

TSMC’s 3-nanometre node, commercially known as N3, has been in volume production for several years and underpins a large share of the company’s leading-edge logic business, including chips for Apple, Qualcomm, and Nvidia’s own GPU compute dies. Choosing a mature 3-nanometre line for the HBM base die, rather than pushing straight to TSMC’s newer 2-nanometre process, points toward a pragmatic calculation: the base die’s job is mostly interface logic and signal routing rather than raw transistor density, so a proven node with established yields matters more than bleeding-edge density for this particular component.

That calculation also reduces risk for Nvidia at a moment when AI chip demand leaves little room for supply disruptions. A newer, less mature process node would carry higher yield uncertainty, and any delay in base die production would stall the entire HBM stack behind it, since the base die has to be ready before the DRAM core dies can be bonded on top. Running the base die on an established node lets TSMC apply manufacturing capacity it already understands well, rather than diverting scarce early-node wafer starts away from other high-value logic customers.

SK Hynix and Micron’s Position in the NVHBM Push

SK hynix currently holds the largest share of Nvidia’s HBM business and has been Nvidia’s primary memory partner through the HBM3E generation, while Micron Technology has worked to expand its own share of Nvidia’s supply chain over the past two years. The Seoul Economic Daily report groups all three companies together as recipients of the same request from Nvidia, but it does not specify whether SK hynix and Micron have reached the same internal decision Samsung reportedly has, or whether their own reviews are still underway.

That distinction matters because SK hynix, unlike Samsung, does not operate a major third-party logic foundry business competing with TSMC, so adopting TSMC’s process for its base dies would not carry the same symbolic weight it does for Samsung. Micron similarly has no foundry rivalry with TSMC to navigate. Samsung’s situation is the one drawing attention precisely because it is the only one of the three companies being asked to effectively route work to a direct competitor rather than simply to an established outside foundry partner it already uses.

Why the AI Memory Bottleneck Is Forcing This Shift

High-bandwidth memory has become one of the tightest links in the AI hardware supply chain over the past two years, as GPU makers push more memory capacity and bandwidth into each accelerator to keep pace with growing AI model sizes. Nvidia’s data center GPUs now ship with HBM stacks that account for a meaningful share of each chip’s total bill of materials, and allocation of that memory has become a genuine constraint on how many GPUs Nvidia and its partners can actually build and sell in a given quarter.

That bottleneck has already rippled into consumer electronics. Global smartphone shipments posted their worst third quarter in 14 years, a decline tied directly to memory component shortages as DRAM and NAND capacity gets redirected toward AI data center demand, according to TrendinTech’s coverage of the memory shortage squeezing smartphone shipments. Pricing pressure has shown up on the GPU side too, with AMD raising GDDR6 prices while Nvidia has so far held its GDDR7 pricing steady, according to TrendinTech’s report on the GDDR6 price increase. Against that backdrop, a move that standardizes and tightens Nvidia’s HBM base die supply chain looks less like an isolated manufacturing decision and more like an attempt to lock in predictable output at a moment when memory capacity, not GPU compute, is increasingly the limiting factor on AI hardware supply.

Historical Context: Two Decades of Samsung and TSMC Rivalry

Samsung and TSMC have competed for leading-edge foundry business since the early 2010s, when both companies began racing to commercialize progressively smaller process nodes for mobile chips, then later for high-performance computing and AI accelerators. TSMC has generally held the larger share of that market, particularly for the most advanced nodes, while Samsung has used its foundry business as a strategic complement to its own memory and logic chip manufacturing, often undercutting TSMC on price to win customers away.

HBM manufacturing has sat apart from that rivalry until now, largely because HBM stacks have been treated as memory products designed and built end to end by the memory makers themselves, with TSMC playing no direct role in the DRAM or base die production. The Seoul Economic Daily report’s framing, that this would be the first time the two companies have partnered at the HBM manufacturing stage, highlights how unusual it is for a memory maker to route any part of an HBM stack through a logic foundry it otherwise competes against for business. It is a sign of how far AI compute demand has reshaped manufacturing relationships that were previously drawn along much cleaner competitive lines.

Market Impact: What This Means for Nvidia’s GPU Roadmap

For Nvidia, standardizing the NVHBM base die on TSMC’s 3-nanometre process offers a path to tighter control over the memory side of its next-generation GPU packages at a time when the company has already been reshuffling its own product lineup to manage supply constraints. Nvidia reportedly discontinued its RTX 5090 consumer card and shifted GB202 die allocation toward its RTX Pro professional lineup earlier this year, a move TrendinTech covered in detail when reporting on Nvidia pulling the RTX 5090. A tighter, more standardized HBM supply chain feeding into Nvidia’s data center and professional GPU lines would complement that kind of allocation strategy, since it gives Nvidia more predictable memory output to pair with whichever GPU dies it prioritizes for production in a given quarter.

There is also a competitive angle worth watching. Nvidia’s rivals in the AI accelerator market, including AMD and a growing list of custom silicon efforts from hyperscalers, all depend on the same narrow set of HBM suppliers. If Nvidia’s custom NVHBM arrangement with TSMC improves its own base die yields or lead times relative to standard HBM, it could widen the gap between Nvidia’s supply reliability and that of competitors still buying off-the-shelf HBM stacks from the same three memory makers.

Companies Named in the NVHBM Base Die Arrangement

Company	Role in the Report	Status According to Seoul Economic Daily
Nvidia	Requested TSMC process for NVHBM base dies	Confirmed as the party making the request
Samsung Electronics	Memory supplier asked to adopt TSMC’s 3nm process	Confirmed it accepted after internal review
TSMC	Foundry partner for the NVHBM base die	Confirmed as the designated process provider
SK hynix	Memory supplier asked to adopt TSMC’s process	Named in the request, decision not detailed
Micron Technology	Memory supplier asked to adopt TSMC’s process	Named in the request, decision not detailed

NVHBM Base Die vs Standard HBM: Key Differences

Component	Standard HBM Approach	Reported NVHBM Approach
Base die design	Designed and built by the memory maker	Custom design tied to TSMC’s 3nm process
Base die foundry	Memory maker’s own fabrication lines	TSMC, regardless of which memory maker ships the stack
Core die DRAM	Each memory maker’s proprietary DRAM process	Sixth-generation DRAM technology per supplier
Design control	Largely controlled by the memory maker	Greater input from Nvidia on base die architecture
Supplier consistency	Each HBM stack differs by manufacturer	Standardized logic interface across suppliers

What Remains Unconfirmed

Several details tied to this story circulated in a separate Seoul Economic Daily report but have not been independently confirmed through the reporting reviewed here. Claims that NVHBM would increase memory bandwidth by 30 percent, cut power consumption by 15 percent, or that TSMC has achieved a yield above 90 percent on the relevant process step should be treated as unverified until Nvidia, Samsung, or TSMC addresses them directly. Similarly, no production volume, delivery schedule, pricing structure, or final commercial launch date for NVHBM has been disclosed in any of the reporting. Readers should treat specific performance figures tied to NVHBM with caution until the companies involved confirm them on the record, which typically happens during quarterly earnings calls or official product announcements.

It is also worth noting that Samsung, SK hynix, Micron, Nvidia, and TSMC have not issued direct statements confirming the arrangement as described. Every outlet covering the story, from the Economic Times to Ground News to The News International, is relaying the same underlying Seoul Economic Daily report rather than independent reporting, which is a common pattern for South Korean supply chain news that later gets confirmed or denied once companies report earnings.

Predictions: Where This Arrangement Goes From Here

Expect Samsung, SK hynix, or Micron to address the NVHBM base die arrangement directly during their next quarterly earnings calls, since analysts covering the memory sector will almost certainly ask about it given how unusual the Samsung and TSMC pairing is.
If TSMC capacity for the 3-nanometre base die line becomes constrained, watch for reports that Samsung is quietly producing a portion of the base dies on its own foundry as a contingency, which the current reporting has flagged as unconfirmed but plausible.
Nvidia is likely to extend similar base die standardization requests to future HBM generations beyond NVHBM, since the approach gives Nvidia more use over its three memory suppliers simultaneously rather than negotiating each relationship separately.
Pricing for next-generation Nvidia data center GPUs carrying NVHBM will likely reflect the added manufacturing complexity of routing base dies through a second foundry, though no concrete pricing has been disclosed yet.
Rival AI chip makers relying on the same three memory suppliers may face longer lead times for their own HBM allocations if TSMC’s base die capacity becomes a shared bottleneck prioritized for Nvidia’s orders first.

How This Fits the Broader Memory Supply Squeeze

The NVHBM base die arrangement arrives at a moment when memory supply, not GPU compute capacity, has become the defining constraint on AI hardware output. Storage and memory makers have been pulled in multiple directions at once, with companies like Kioxia pushing enterprise SSD performance higher to compete for data center budget, as detailed in TrendinTech’s report on Kioxia’s SSD hitting 20 million IOPS, even as DRAM and NAND capacity gets diverted toward AI accelerator demand. That same dynamic has pushed Nvidia’s own China market share down this year as competitors like Huawei gain ground, a shift covered in TrendinTech’s analysis of Nvidia’s falling China chip share.

Seen against that backdrop, Samsung’s reported decision to route NVHBM base die production through TSMC looks less like a one-off manufacturing quirk and more like a structural response to a supply chain where every link, from DRAM wafers to advanced packaging to base die logic, is being renegotiated to keep pace with Nvidia’s GPU shipment targets. The willingness of Samsung, a company that has spent years building Samsung Foundry into a TSMC competitor, to accept this arrangement signals just how much use Nvidia currently holds over its memory suppliers.

What to Watch Next

The next meaningful confirmation point will likely come from Samsung’s upcoming earnings disclosures, where the company typically breaks out memory division performance and foundry utilization separately. Analysts on that call are expected to press Samsung executives on whether the TSMC arrangement is exclusive to NVHBM base dies or signals a broader willingness to use TSMC for other memory-adjacent logic work going forward. SK hynix and Micron’s own quarterly updates will be worth watching for any confirmation of their side of the same Nvidia request, since the Seoul Economic Daily report left both companies’ individual decisions unspecified.

TSMC’s own capacity planning disclosures could also offer an early signal of how much wafer volume the company is allocating to HBM base die work versus its existing logic chip customers, including Nvidia’s own GPU dies, Apple’s processors, and Qualcomm’s mobile chips. Any sign of capacity strain at TSMC’s 3-nanometre line would raise the odds of Samsung falling back on its own foundry for a portion of base die production, the contingency flagged as unconfirmed in the current reporting.

Frequently Asked Questions

What did Seoul Economic Daily report about Samsung and TSMC?
Seoul Economic Daily reported on October 18, 2026 that Samsung Electronics will use TSMC’s 3-nanometre process to produce base dies for Nvidia’s next-generation custom high-bandwidth memory chips, known as NVHBM.

What is NVHBM?
NVHBM is Nvidia’s custom high-bandwidth memory design, distinct from the standard HBM3E or HBM4 modules memory makers currently sell as finished components. Nvidia reportedly has greater input into the base die architecture for NVHBM.

Why would Samsung use TSMC, a direct foundry rival, for part of its memory production?
According to Seoul Economic Daily, Nvidia asked Samsung, SK hynix, and Micron to use TSMC’s process for NVHBM base dies. Samsung accepted after an internal review, though the companies have not issued on-record statements explaining the business rationale.

Are SK hynix and Micron also using TSMC for their base dies?
The report says Nvidia made the same request to SK hynix and Micron Technology, but it does not confirm whether either company has reached a final decision the way Samsung reportedly has.

Will Samsung still produce some base dies in its own foundry?
That possibility was attributed to an unnamed source and remains unconfirmed. It has not been verified by Samsung, TSMC, or Nvidia directly.

Is this the first time Samsung and TSMC have worked together on chip manufacturing?
It is reportedly the first time the two companies have partnered specifically at the HBM manufacturing stage, though both have participated in the broader chip ecosystem as competitors for decades.

Has Nvidia confirmed the 30 percent bandwidth increase or 15 percent power reduction figures for NVHBM?
No. Those figures appeared in a separate Seoul Economic Daily report and have not been independently confirmed by Nvidia, Samsung, or TSMC.

When will NVHBM ship in Nvidia’s products?
No production volume, delivery schedule, or commercial launch date has been disclosed. The current reporting only confirms the manufacturing arrangement, not a product timeline.

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